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          FSMC HADDR和FSMC_A对应问题
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        <p>参考原文：<a target="_blank" rel="noopener" href="https://www.cnblogs.com/yeshenmeng/p/15597980.html">https://www.cnblogs.com/yeshenmeng/p/15597980.html</a></p>
<p>​                   <a target="_blank" rel="noopener" href="https://blog.csdn.net/ABAP_Brave/article/details/53080703">https://blog.csdn.net/ABAP_Brave/article/details/53080703</a></p>
<p>​                   <a target="_blank" rel="noopener" href="https://blog.csdn.net/alalalalaya/article/details/110670881">https://blog.csdn.net/alalalalaya/article/details/110670881</a></p>
<h3 id="1-FSMC存储块"><a href="#1-FSMC存储块" class="headerlink" title="1.FSMC存储块"></a>1.FSMC存储块</h3><p>​        FSMC的外部设备地址映像:STM32的FSMC将外部存储器划分为固定大小为256M字节的四个存储块：</p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/202210172156797.png" style="zoom:67%;">

<p>​        FSMC分为4块,每块256M字节又被划分为4*64,即四个片选<br>​        NOR / PSRAM使用块1,共256M<br>        NAND闪存使用块2,3,共512M<br>​        PC卡使用块4,共256M</p>
<h3 id="2-存储块1-Bank1-介绍"><a href="#2-存储块1-Bank1-介绍" class="headerlink" title="2.存储块1(Bank1)介绍"></a>2.存储块1(Bank1)介绍</h3><p>​        STM32的FSMC存储块1（Bank1）用于驱动NOR FLASH/SRAM/PSRAM<br>​        Bank1被分为4个区，每个区管理64M字节空间，每个区都有独立的寄存器对所连接的存储器进行配置。<br>​        Bank1的256M字节空间由28根地址线（HADDR[27:0]）寻址。 <strong>这里HADDR，是内部AHB地址总线</strong>，<br>​        **HADDR[25:0]来自外部存储器地址FSMC_A[25:0]**，而HADDR[26:27]对4个区进行寻址。</p>
<p>​        如下图所示:</p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/202210172210099.png" style="zoom:77%;">

<figure class="highlight c"><table><tr><td class="gutter"><pre><span class="line">1</span><br><span class="line">2</span><br><span class="line">3</span><br><span class="line">4</span><br><span class="line">5</span><br><span class="line">6</span><br><span class="line">7</span><br><span class="line">8</span><br><span class="line">9</span><br><span class="line">10</span><br><span class="line">11</span><br><span class="line">12</span><br><span class="line">13</span><br><span class="line">14</span><br><span class="line">15</span><br></pre></td><td class="code"><pre><span class="line">说明:</span><br><span class="line">     HADDR[<span class="number">27</span>:<span class="number">26</span>]是不可手动配置的,当选择所在区后会自动赋值</span><br><span class="line"></span><br><span class="line">注意:</span><br><span class="line">     <span class="number">1</span>,当Bank1接 <span class="number">8</span>位宽度存储器时：HADDR[<span class="number">25</span>:<span class="number">0</span>] -&gt; FSMC_A[<span class="number">25</span>:<span class="number">0</span>]</span><br><span class="line">     <span class="number">2</span>,当Bank1接<span class="number">16</span>位宽度存储器时：HADDR[<span class="number">25</span>:<span class="number">1</span>] -&gt; FSMC_A[<span class="number">24</span>:<span class="number">0</span>]</span><br><span class="line"></span><br><span class="line">        由于内部每个地址对应一个字节,外部设备<span class="number">16</span>位宽,FSMC的一个地址对应两个字节</span><br><span class="line">        即:</span><br><span class="line">             <span class="number">0000</span>对应FSMC_A[<span class="number">0</span>]=<span class="number">0</span>   (<span class="number">2</span>字节)</span><br><span class="line">             <span class="number">0010</span>对应FSMC_A[<span class="number">0</span>]=<span class="number">1</span>   (<span class="number">2</span>字节)</span><br><span class="line">             <span class="number">0100</span>对应FSMC_A[<span class="number">1</span>]=<span class="number">1</span>   (<span class="number">2</span>字节)</span><br><span class="line"></span><br><span class="line">        所以对应关系需要除以<span class="number">2</span>,内部右移一位对齐</span><br><span class="line">        此时最低位没用,访问最低位需要使用UB/LB</span><br></pre></td></tr></table></figure>
<h3 id="3-FSMC-HADDR和FSMC-A对应关系"><a href="#3-FSMC-HADDR和FSMC-A对应关系" class="headerlink" title="3.FSMC HADDR和FSMC_A对应关系"></a>3.FSMC HADDR和FSMC_A对应关系</h3><p><strong>问题：</strong></p>
<p>当外部存储器是8位数据宽度时， HADDR[25:0]与FSMC_A[25:0]对应相连</p>
<p>当外部存储器是16位数据宽度时，HADDR[25:1]与FSMC_A[24:0]对应相连，HADDR[0]未接</p>
<p>或者看下面这个实例：</p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/202210172225064.png" style="zoom:67%;">

<p><strong>ARM芯片的A1引脚连接的是SRAM芯片的A0地址引脚</strong>。由图可以看出，SRAM芯片的数据总线是16位宽，即一次传输2个字节的数据。因此，我们可以这样理解，即一个地址空间其实对应着2个字节的数据。</p>
<p><strong>原因：</strong></p>
<p>​        首先，CPU中一个地址只能存储一个字节的数据，而当CPU通过地址线访问外部存储器的一个地址时，如果外部储存器的一个地址的数据刚好是八位时（即一个字节），访问一次就可接收过来；但是，当外部存储器的一个地址里存的是16位数据时（即两个字节），CPU就开始傻眼了，“我访问你一次，你竟然给我两个字节的数据！！！”（如下图所示）</p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/202210172230207.png" style="zoom:67%;">

<p>​        然后，CPU为了解决这个问题，只能够再派一个地址去访问外部存储器的同一个地址，把剩下的那个字节也接收过来，之后再接着访问外部存储器的第二个地址，依此类推。。。在此过程中，CPU如果还是把地址线一对一地连接到外部存储器上，那就做不到让自己的第二个地址还继续访问同一个地址了。。。</p>
<p>​        于是，人们帮了CPU一把，让它每一回访问时还是照旧把自己内部的地址按二进制拆分放到HADDR的0~25上（如下图）</p>
<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/202210172233844.png" style="zoom:67%;">

<img src="https://xdl-blog-picture.oss-cn-shanghai.aliyuncs.com/img/202210172234128.png" style="zoom:67%;">

<p>​        由图片红色部分可知，如读取外部存储器地址0中的#a、#b数据，CPU先发送地址0、再发送地址1。站在CPU的角度，它以为自己发送了两个不一样的地址（地址0、地址1）到外部存储器，然后，到了FSMC_A一端，人们选择性地去掉HADDR[0]，然后才把把剩余的25根依次接到FSMC_A上。然而对于外部存储器来说，它只收到读地址0的数据，所以外部存储器就把#a、#b的数据返回给CPU。即对于16位数据宽度的外部存储器来说，因为CPU一个地址存储1个字节数据，外部16位数据宽度存储器1个地址存储2个字节数据，所以CPU的地址0、1对应外部存储器的地址0，地址2、3对应外部存储器的地址1，以此类推。</p>
<p>​        在CPU那边，它对人们把HADDR[0]不接到FSMC上是不知情的，所以，它还是照旧把地址逐次增一地去访问，也还是发出一个地址读回一个字节，但是它不知道的是，自己每发两个地址都会停留在外部存储器的同一个地址上，所以最终，同一个地址上的两个字节都会被CPU读走。。。</p>

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